03 Display
This product supports LCD display defined by HDMI and MIPI DSI interface as graphic output interface
1 Switching method
1.1 HDMI Display
First open the source directory, open /kernel/linux/spacemit_kernel-6.6/arch/riscv/boot/dts/spacemit/k1-x_SMT001.dts, select Open HDMI and Close MIPI in the configuration file
# 打开 HDMI
&dpu_online2_hdmi {
memory-region = <&dpu_resv>;
status = "okay";
};
&hdmi{
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
# 关闭 MIPI DSI
&dpu_online2_dsi {
memory-region = <&dpu_resv>;
spacemit-dpu-bitclk = <500000000>;
spacemit-dpu-escclk = <51200000>;
dsi_1v2-supply = <&ldo_5>;
vin-supply-names = "dsi_1v2";
status = "disabled";
};
&dsi2 {
status = "disabled";
panel2: panel2@0 {
status = "ok";
compatible = "spacemit,mipi-panel2";
reg = <0>;
gpios-reset = <81>;
gpios-dc = <82 83>;
id = <2>;
delay-after-reset = <10>;
force-attached = "lcd_gx09inx101_mipi";
};
};
&lcds {
status = "disabled";
};1.2 MIPI DSI Display
Open the source directory, open /kernel/linux/spacemit_kernel-6.6/arch/riscv/boot/dts/spacemit/k1-x_SMT001.dts, select Open MIPI in the configuration file, and close HDMI
# 打开 MIPI DSI
&dpu_online2_dsi {
memory-region = <&dpu_resv>;
spacemit-dpu-bitclk = <500000000>;
spacemit-dpu-escclk = <51200000>;
dsi_1v2-supply = <&ldo_5>;
vin-supply-names = "dsi_1v2";
status = "okay";
};
&dsi2 {
status = "okay";
panel2: panel2@0 {
status = "ok";
compatible = "spacemit,mipi-panel2";
reg = <0>;
gpios-reset = <81>;
gpios-dc = <82 83>;
id = <2>;
delay-after-reset = <10>;
force-attached = "lcd_gx09inx101_mipi";
};
};
&lcds {
status = "okay";
};
# 关闭 HDMI
&dpu_online2_hdmi {
memory-region = <&dpu_resv>;
status = "disabled";
};
&hdmi{
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "disabled";
};2 MIPI screen does not display problem
2.1 Check k1-x-lcd.dtsi
The path is kernel/linux/spacemit_kernel-6.6/arch/riscv/boot/dts/spacemit/k1-x-lcd.dtsi, which includes irq, clock and power domain related configurations.
&soc {
display-subsystem-dsi {
compatible = "spacemit,saturn-le";
reg = <0 0xC0340000 0 0x2A000>;
ports = <&dpu_online2_dsi>;
interconnects = <&dram_range1>;
interconnect-names = "dma-mem";
};
dpu_online2_dsi: port@c0340000 {
compatible = "spacemit,dpu-online2";
interrupt-parent = <&intc>;
interrupts = <90>, <89>;
interrupt-names = "ONLINE_IRQ", "OFFLINE_IRQ";
clocks = <&ccu CLK_DPU_PXCLK>,
<&ccu CLK_DPU_MCLK>,
<&ccu CLK_DPU_HCLK>,
<&ccu CLK_DPU_ESC>,
<&ccu CLK_DPU_BIT>;
clock-names = "pxclk", "mclk", "hclk", "escclk", "bitclk";
resets = <&reset RESET_MIPI>,
<&reset RESET_LCD_MCLK>,
<&reset RESET_LCD>,
<&reset RESET_DSI_ESC>;
reset-names= "dsi_reset", "mclk_reset", "lcd_reset","esc_reset";
power-domains = <&power K1X_PMU_LCD_PWR_DOMAIN>;
pipeline-id = <ONLINE2>;
ip = "spacemit-saturn";
spacemit-dpu-min-mclk = <40960000>;
type = <DSI>;
clk,pm-runtime,no-sleep;
status = "disabled";
dpu_online2_dsi_out: endpoint@0 {
remote-endpoint = <&dsi2_in>;
};
dpu_offline0_dsi_out: endpoint@1 {
remote-endpoint = <&wb0_in>;
};
};
dsi2: dsi2@d421a800 {
compatible = "spacemit,dsi2-host";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0xD421A800 0 0x200>;
interrupt-parent = <&intc>;
interrupts = <95>;
ip = "synopsys-dhost";
dev-id = <2>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dsi2_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&dphy2_in>;
};
};
port@1 {
reg = <1>;
dsi2_in: endpoint {
remote-endpoint = <&dpu_online2_dsi_out>;
};
};
};
};
dphy2: dphy2@d421a800 {
compatible = "spacemit,dsi2-phy";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0xD421A800 0 0x200>;
ip = "spacemit-dphy";
dev-id = <2>;
status = "okay";
port@1 {
reg = <1>;
dphy2_in: endpoint {
remote-endpoint = <&dsi2_out>;
};
};
};
wb0 {
compatible = "spacemit,wb0";
dev-id = <2>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
wb0_in: endpoint {
remote-endpoint = <&dpu_offline0_dsi_out>;
};
};
};
};
};2.2 Check lcd_gx09inx101_mipi.dtsi
The path is: kernel/linux/spacemit_kernel-6.6/arch/riscv/boot/dts/spacemit/lcd/lcd_gx09inx101_mipi.dtsi The panel list includes: MIPI DSI working mode, panel initialization sequence, and timing.
// SPDX-License-Identifier: GPL-2.0
/ { lcds: lcds {
lcd_gx09inx101_mipi: lcd_gx09inx101_mipi {
dsi-work-mode = <1>; /* video burst mode*/
dsi-lane-number = <4>;
dsi-color-format = "rgb888";
width-mm = <142>;
height-mm = <228>;
use-dcs-write;
/*mipi info*/
height = <1280>;
width = <720>;
hfp = <80>;
hbp = <40>;
hsync = <10>;
vfp = <20>;
vbp = <16>;
vsync = <4>;
fps = <60>;
work-mode = <0>;
rgb-mode = <3>;
lane-number = <4>;
phy-bit-clock = <500000000>;
phy-esc-clock = <51200000>;
split-enable = <0>;
eotp-enable = <0>;
burst-mode = <2>;
esd-check-enable = <0>;
/* DSI_CMD, DSI_MODE, timeout, len, cmd */
initial-command = [
39 01 01 01 11
39 01 01 04 FF 98 81 03
39 01 01 02 01 00
39 01 01 02 02 00
39 01 01 02 03 72
39 01 01 02 04 00
39 01 01 02 05 00
39 01 01 02 06 09
39 01 01 02 07 00
39 01 01 02 08 00
39 01 01 02 09 01
39 01 01 02 0A 00
39 01 01 02 0B 00
39 01 01 02 0C 01
39 01 01 02 0D 00
39 01 01 02 0E 00
39 01 01 02 0F 00
39 01 01 02 10 00
39 01 01 02 11 00
39 01 01 02 12 00
39 01 01 02 13 00
39 01 01 02 14 00
39 01 01 02 15 00
39 01 01 02 16 00
39 01 01 02 17 00
39 01 01 02 18 00
39 01 01 02 19 00
39 01 01 02 1A 00
39 01 01 02 1B 00
39 01 01 02 1C 00
39 01 01 02 1D 00
39 01 01 02 1E 40
39 01 01 02 1F 80
39 01 01 02 20 05
39 01 01 02 21 02
39 01 01 02 22 00
39 01 01 02 23 00
39 01 01 02 24 00
39 01 01 02 25 00
39 01 01 02 26 00
39 01 01 02 27 00
39 01 01 02 28 33
39 01 01 02 29 02
39 01 01 02 2A 00
39 01 01 02 2B 00
39 01 01 02 2C 00
39 01 01 02 2D 00
39 01 01 02 2E 00
39 01 01 02 2F 00
39 01 01 02 30 00
39 01 01 02 31 00
39 01 01 02 32 00
39 01 01 02 33 00
39 01 01 02 34 04
39 01 01 02 35 00
39 01 01 02 36 00
39 01 01 02 37 00
39 01 01 02 38 3C
39 01 01 02 39 00
39 01 01 02 3A 40
39 01 01 02 3B 40
39 01 01 02 3C 00
39 01 01 02 3D 00
39 01 01 02 3E 00
39 01 01 02 3F 00
39 01 01 02 40 00
39 01 01 02 41 00
39 01 01 02 42 00
39 01 01 02 43 00
39 01 01 02 44 00
39 01 01 02 50 01
39 01 01 02 51 23
39 01 01 02 52 45
39 01 01 02 53 67
39 01 01 02 54 89
39 01 01 02 55 AB
39 01 01 02 56 01
39 01 01 02 57 23
39 01 01 02 58 45
39 01 01 02 59 67
39 01 01 02 5A 89
39 01 01 02 5B AB
39 01 01 02 5C CD
39 01 01 02 5D EF
39 01 01 02 5E 11
39 01 01 02 5F 01
39 01 01 02 60 00
39 01 01 02 61 15
39 01 01 02 62 14
39 01 01 02 63 0E
39 01 01 02 64 0F
39 01 01 02 65 0C
39 01 01 02 66 0D
39 01 01 02 67 06
39 01 01 02 68 02
39 01 01 02 69 02
39 01 01 02 6A 02
39 01 01 02 6B 02
39 01 01 02 6C 02
39 01 01 02 6D 02
39 01 01 02 6E 07
39 01 01 02 6F 02
39 01 01 02 70 02
39 01 01 02 71 02
39 01 01 02 72 02
39 01 01 02 73 02
39 01 01 02 74 02
39 01 01 02 75 01
39 01 01 02 76 00
39 01 01 02 77 14
39 01 01 02 78 15
39 01 01 02 79 0E
39 01 01 02 7A 0F
39 01 01 02 7B 0C
39 01 01 02 7C 0D
39 01 01 02 7D 06
39 01 01 02 7E 02
39 01 01 02 7F 02
39 01 01 02 80 02
39 01 01 02 81 02
39 01 01 02 82 02
39 01 01 02 83 02
39 01 01 02 84 07
39 01 01 02 85 02
39 01 01 02 86 02
39 01 01 02 87 02
39 01 01 02 88 02
39 01 01 02 89 02
39 01 01 02 8A 02
39 01 01 04 FF 98 81 04
39 01 01 02 6C 15
39 01 01 02 6E 2A
39 01 01 02 6F 33
39 01 01 02 3A 94
39 01 01 02 8D 1A
39 01 01 02 87 BA
39 01 01 02 26 76
39 01 01 02 B2 D1
39 01 01 02 B5 06
39 01 01 04 FF 98 81 01
39 01 01 02 22 0A
39 01 01 02 31 00
39 01 01 02 40 13
39 01 01 02 53 84
39 01 01 02 55 8F
39 01 01 02 50 AE
39 01 01 02 51 AE
39 01 01 02 60 28
39 01 01 02 A0 0F
39 01 01 02 A1 1B
39 01 01 02 A2 28
39 01 01 02 A3 12
39 01 01 02 A4 15
39 01 01 02 A5 28
39 01 01 02 A6 1B
39 01 01 02 A7 1E
39 01 01 02 A8 79
39 01 01 02 A9 1B
39 01 01 02 AA 27
39 01 01 02 AB 69
39 01 01 02 AC 19
39 01 01 02 AD 18
39 01 01 02 AE 4C
39 01 01 02 AF 21
39 01 01 02 B0 28
39 01 01 02 B1 52
39 01 01 02 B2 65
39 01 01 02 C0 04
39 01 01 02 C1 1B
39 01 01 02 C2 27
39 01 01 02 C3 13
39 01 01 02 C4 15
39 01 01 02 C5 28
39 01 01 02 C6 1C
39 01 01 02 C7 1E
39 01 01 02 C8 79
39 01 01 02 C9 1A
39 01 01 02 CA 27
39 01 01 02 CB 69
39 01 01 02 CC 1A
39 01 01 02 CD 18
39 01 01 02 CE 4C
39 01 01 02 CF 21
39 01 01 02 D0 27
39 01 01 02 D1 52
39 01 01 02 D2 65
39 01 01 02 D3 3F
39 01 01 04 FF 98 81 00
39 01 01 01 29
39 01 01 02 35 00
];
sleep-in-command = [
39 01 78 01 28
39 01 78 01 10
];
sleep-out-command = [
39 01 96 01 11
39 01 32 01 29
];
read-id-command = [
37 01 00 01 05
14 01 00 05 fb fc fd fe ff
];
display-timings {
timing0 {
clock-frequency = <75000000>;
hactive = <720>;
hfront-porch = <80>;
hback-porch = <40>;
hsync-len = <10>;
vactive = <1280>;
vfront-porch = <20>;
vback-porch = <16>;
vsync-len = <4>;
vsync-active = <1>;
hsync-active = <1>;
};
};
};
};};